Method for producing miniature amplifier and signal processing unit

ABSTRACT

A method for producing miniature amplifier and signal processing unit includes the steps of:  
     producing arrays of individual integrated circuits on a side of a wafer, where each circuit has a number of I/O connection points;  
     providing a number of solder connection pads at each integrated circuit for redistribution of the I/O connection points of the integrated circuit;  
     coating the side of the wafer having the solder connection pads-with a protection coating and ensuing through going apertures in the coating to provide electrical contact with the solder connection pads;  
     applying electrical components onto the coating and gaining electrical contact with the solder connection pads through the apertures of the coating material; and  
     singulating the individual amplifiers from the wafer and ensuring light protection of the edges and possible unprotected side of the amplifiers.

AREA OF THE INVENTION

[0001] Integrated circuits (IC) are used in numerous electronic devices.One example of such a device is hearing aids wherein the integratedcircuits are used for signal processing and amplification. The inventionis especially relevant in connection with hearing aids, due to therequired small size of these, but the invention is also relevant in anysmall size electronic device, in which speedy signal processing isrequired.

[0002] Integrated circuits are produced on large silicon wafers andsingulated before they are connected to a printed circuit board (PCB),usually by wire bonding from connection pads along the edge of the IC.

[0003] In resent years a new process has been developed, in which aredistribution layer is applied to the surface of the IC, and an areaarray of solder bumps (ball grid array or BGA) is attached to thesurface redistribution layer. These processes may be performed at thewafer level, and followed by singulation, and in some casesencapsulation for protection purposes. After singulation, the chip maybe inverted, placed at a PCB, and by heating be attached through the BGAto the circuit board. Thereby the wire bonding can be omitted. Also itis known to stack various IC components using the BGA on one or bothsides of the chips to gain connection between the stacked components.

BACKGROUND OF THE INVENTION

[0004] Usually IC's are mounted on printed circuit boards and gainscontact with in and output signals and further electric componentsthrough the circuits on the circuit board. The circuit board isspace-consuming, and further the processes used to connect the IC to thecircuits on the board requires multiple steps which all must be free oferrors. Safe methods have been developed like the mentioned directconnection through a BGA, but long process times are still required.Further the voluminous printed circuit board is a major problemespecially in hearing aids and similar electronic devices.

[0005] In U.S. Pat. No. 5,563,084 a method of making a threedimensionally integrated circuit is disclosed. First and secondsubstrates are provided with devices in at least one layer in at leastone surface each. An auxiliary substrate is connected to the one surfaceof the substrates, which is then reduced in thickness from its oppositesurface. The auxiliary layer with the devices thereon is then separatedinto individual chips, which after having been found to be functioningare aligned and mounted in a side-by-side arrangement on the one surfaceof the first substrate. Electrical connections are formed between thedevices of the mounted chips and the devices in the first substrate. Thedocument does not disclose any way of protecting the individual dice ina wafer level process.

[0006] U.S. Pat. No. 6,235,141 discloses a mass production method forintegrated optical subsystems. The invention concerns the alignement ofsingular dies with the dies in a wafer and subsequent bonding of thesingular dies with the wafer. Following this the dies are diced to forma bonded pair of dies containing at least one optical element. Thedocument does not disclose any way of protecting the individual dice ina wafer level process.

[0007] U.S. Pat. No. 6,177,295 discloses a method for forming individualsemiconductor devices by sandwiching a wafer with semiconductor elementson a first side thereon between two glass plates. The devices are dicedby sawing.

[0008] The object of the invention is to provide a method of producing asignal processing unit comprising an IC, which is faster and less proneto errors, and which is ready for use without the need of an underlyingcircuit board. In the following the signal processing unit is referredto as an amplifier, but any type of signal processing may take place inthe unit.

SUMMARY OF THE INVENTION

[0009] The objective is achieved with the method according to claim 1 byproducing the miniature amplifier and signal-processing unit using thefollowing steps:

[0010] producing arrays of integrated circuits on a side of a wafer,where each circuit has a number of I/O connection points,

[0011] providing a number of solder connection pads at each integratedcircuit for redistribution of the I/O connection of the integratedcircuit,

[0012] coating the side or sides of the wafer having the solderconnection pads with a protection material and ensuing through goingapertures in the coating to provide electrical contact with the solderconnection pads,

[0013] applying electrical components onto the coating and gainingelectrical contact with the solder connection pads through the aperturesof the coating material,

[0014] singulating the individual amplifiers from the wafer by providingfurrows along the edges of each amplifier through the thickness of thewafer and

[0015] ensuring protection of the edges and possible unprotected side ofthe amplifiers while the individual amplifiers remain fastened to thecarrier layer.

[0016] Once an individual amplifier is singulated from the entire wafer,and the protection of edges and possible unprotected side is ensured,the amplifier is ready for use in a hearing aid or similar device. Nomounting of the IC on a PCB is necessary, as the further electroniccomponents required to produce the output signal from the amplifier aremounted on the surface or surfaces of each amplifier before singulationfrom the wafer. The formation of the furrows for the singulation maytake place in any known manner eg. by sawing. Wires may be soldereddirectly to the solder connection pads for input and output signals andfor current supply. The method according to claim 1 is both time savingand results in fewer errors, as the number of electric connections whichmust be established, is reduced. Further, handling of the individualamplifiers after singulation is avoided, as singulation and coating forlight and environmental protection is the last process the amplifiersare going through before mounting in the instrument in which they are tofunction.

[0017] In a further embodiment of the method the following steps areperformed:

[0018] embedding a first side of the wafer in a polymer substance,

[0019] providing a carrier layer to the polymer substance and hardeningthe polymer substance such that each amplifier is retained embedded inthe polymer substance and attached to the carrier,

[0020] singulating the amplifiers from the opposite side of said firstside of the wafer.

[0021] If components are mounted on the first side of the wafer, theyshould be protected during singulation and this is done by embedding thecomponents in a polymer substance, which will harden into an elasticlayer, wherefrom the amplifiers at a later stage may be peeled of. If nocomponents are present on the first side, the polymer substance actsprimarily as an adhesive, which retains the wafer on the carrier layer.The polymer substance is also known as sawing glue.

[0022] For handling purposes the carrier layer, preferably a rigid layeris provided at the polymer substance, such that the wafer in effect isglued to the carrier layer by the polymer substance. If components areonly present at the first side of the wafer, the wafer may at this stagebe thinned down by well-known back labbing methods. The advantage isthat the rigid carrier layer facilitates handling and holding of thewafer during this operation. However if the chip has its final thicknessno backlabbing will take place.

[0023] After singulation of the amplifiers, they will still be attachedto the carrier layer for subsequent operations, but they are easilypeeled of.

[0024] In an embodiment of the invention the singulation of theamplifiers is accomplished by means of V shaped furrows through thethickness of the wafer provided along the edge of each amplifier. Aconventional saw easily provides the V shaped furrows, preferably around saw. But other alternatives are known such as etching techniquesore laser cutting. The V shape of the furrows makes subsequent coatingof the side edges of the amplifiers easy.

[0025] In an embodiment the protection of the edges and possibleunprotected side of the amplifiers is accomplished by applying aprotection layer to the amplifiers. As the individual amplifiers arestill attached to the carrier layer, all the amplifiers of a whole wafermay be treated simultaneously and a uniform protection layer may beaccomplished. The protection layer protects the IC of the amplifier fromlight and other harmful environmental influences. The individualhandling of the amplifiers during this delicate process is avoided.

[0026] Preferably the protection layer is provided by metalization ofthe amplifiers. In the case, where electric components are also attachedto the back of the wafer, the metalization layer should only cover theedges of the amplifiers. The use of metalization layers results in verydens and durable protection layers.

[0027] In a further embodiment of the invention two or more carrierand/or information layers are applied to a first side of the wafer priorto singulation. Singulation is then carried out from the opposite sideof the said first side of the wafer, and such that at least oneinformation layer is severed along the edges of each amplifier, and suchthat the individual amplifiers are retained on at least one un-severedcarrier layer. The information layer, which is severed, remains with theindividual amplifier. The un-severed carrier layer serves to keep theamplifiers of the entire wafer together for further handling andtreatment. After further treatment the individual amplifiers may bepeeled away from the carrier layer. The information layer which stayeswith the amplifier is preferably a printed label, where the carriorlayer may comprise a sheet material or a sawing glue attached to thecarrier plate.

[0028] In the case, where electrical components are present at the firstside of the wafer, the space between the components is filled with asuitable filler to produce a plane surface before the carrier and/orinformation layers are applied.

[0029] Preferably the severed information layers is light protecting,and carries information concerning the identity of each amplifier.

[0030] Preferably the carrier layer carrying the amplifiers is anelastic layer, and said layer is stretched prior to coating the edges ofthe individual amplifiers. By this stretching action the space betweenthe individual amplifiers is increased and more space is given for thecoating of the edges of the amplifiers.

[0031] In an embodiment the protection layer for the edges is providedby filling op the furrows with a fluent or semi-fluent substance,hardening the substance, providing a furrow between adjacent amplifiersleaving the hardened substance attached to the edges of each amplifier.This embodiment provides an even and dense protection layer at all edgesof the amplifier.

[0032] The method according to the invention may be used for producingamplifieres, wherein the solder connection pads and electricalcomponents are provided on both sides of the wafer, and where throughgoing apertures in the wafer are used to allow the I/O connections ofthe integrated circuit to gain contact with the solder connections onthe opposite side of the wafer. The through going apertures must beprovided at areas outside the area of the integrated circuit, but at thesame time such that apertures are located within the perimeter and/or atthe rim of each single amplifier.

BRIEF DESCRIPTION OF THE DRAWINGS

[0033]FIG. 1 is a sectional view of an amplifier according to the priorart;

[0034]FIG. 2 is a sectional view of an amplifier according to a firstembodiment of the invention before singulation;

[0035]FIG. 3 is a sectional view of an amplifier according to a firstembodiment being prepared for singulation;

[0036]FIG. 4 is a sectional view of the amplifier of FIG. 3 aftersingulation;

[0037]FIG. 4 is a sectional view of an amplifier according to a secondembodiment of the invention being prepared for singulation;

[0038]FIG. 5 is a sectional view of the amplifier of FIG. 4 aftersingulation;

[0039]FIG. 6 displays four steps of the protection and singulationaccording to a further embodiment of the invention.

DESCRIPTION OF A PREFERRED EMBODIMENT

[0040] The amplifier in FIG. 1 comprises an integrated circuit 5 and anumber of other electronic components 2 like resistors, capacitors orcoils (only one component is shown). The integrated circuit 5 is mountedon a substrate 18, like alimina ceramic, or pcb and bonded to thesubstrate 18. The substrate 18 has vias (not shown) such that theconnection points of the IC 5 gain contact with printed leads on theopposite side of the substrate 18. On the substrate 18 the otherelectronic components 2 are surface mounted and soldered to gain contactwith the printed leads and through the vias to the IC 5. Also solderbumps 19 are provided for input, output and power supply for theamplifier 5. A chipcoat 20 is arranged on top and sides of the chip 5for protection purposes.

[0041] In FIG. 2 a section through a wafer 5 which has a number ofintegrated circuits on the topside is shown. The integrated circuits arearranged in a two-dimensional array as usual, and in FIG. 2 three of theintegrated circuits of the wafer are shown. On top of the integratedcircuits bonding pads (not shown) are provided, and through aredistribution layer 6 the bonding pads gain contact with solderingbumps 7. The integrated circuit under the redistribution layer must beprotected from light and other harmful environmental influences. To dothis a protection layer 9 is provided over the redistribution layer 6.The protection layer has apertures over the soldering bumps 7, and byfilling the apertures with a suitable soldering material 8, connectionto the soldering bumps 7 is achieved through the apertures. Theprotection layer must as a minimum requirement protect the IC fromlight.

[0042] Having established the protection layer and the solderingmaterial 8 over the soldering bumps 7, electronic components 2 are laidout on each integrated circuit of the wafer. The connection to theterminals of the components is established through heating whereby thesoldering material melts. Further soldering points (not shown) forinput, output and current supply are provided on each IC of the wafer.

[0043]FIG. 3 shows the three amplifiers of FIG. 2 after singulation andafter a protection layer 10 has been applied. Prior to the singulation,the components 2 shown on the topside of the wafer are embedded in apolymer substance 11 such as a pealable solder mask. On top of thepolymer substance 11 a carrier layer 12 is applied. The polymersubstance is left to cure or solidify, which creates a firm bond betweenthe wafer and the carrier layer 12. The amplifiers may now besingulated, but will stay in their position on the carrier layer 12.Preferably a rigid carrier layer 12 is chosen. This technique may beused also if there are no components mounted on the topside of thewafer. In this case the polymer substance 11 serves only to retain theamplifiers on the carrier layer 12 during and after singulation.

[0044] The singulation may be performed in any known manner, andaccording to the invention a round saw having a blade with a V shapedprofile is used. Thereby V shaped furrows 13 are created between theindividual amplifiers. The V shaped furrows are preferably employed whenthe singulation takes place from the side opposite the side having theintegrated circuit.

[0045] The amplifiers shown in FIG. 3 may also have components mountedon the side opposite the side having the integrated circuit. In thiscase this side has a redistribution layer and a light protection layercorresponding to the layers provided on the top of the integratedcircuit. Also connections through the wafer must be provided to allowconnection between the redistribution layer on the opposite side and theintegrated circuit. If components are mounted on both sides the lightprotection layer 10 is only applied to the edges of the individualamplifiers.

[0046] After singulation the entire carrier layer 12 having allamplifiers of the wafer is fed to a workstation for application of alight protection layer 10. This layer is preferably a metal layer, butother types of layers are possible. When the light protection layer isapplied, the individual amplifiers may be peeled of the carrier layer12, leaving the polymer substance 11 adhered at the carrier layer 12.The light protection layer interconnects adjacent amplifiers at thebottom of the furrows, but as this layer is thin, it will brake when theamplifiers are peeled of the carrier layer.

[0047] In another embodiment of the invention shown in FIGS. 4 and 5 thesingulation of the wafers is accomplished after applicaton of aninformation layer 14 and a carrier layer 15. During the singulation theinformation layer 14 is severed, whereas the carrier layer stays intact.If singulation takes place from the side of the wafer having theintegrated circuit, V shaped furrows cannot be used as in the previousexample, (see FIG. 3) but straight furrows must be used as shown in FIG.5. This is because the integrated circuits are produced on the waferwith a minimum of space there between. However if the singulation takesplace from the side opposite the side of the integrated circuit, a Vshaped furrow may be used for the singulation.

[0048] The singulated amplifiers are treated at the edges 18 by aprotection layer 17 as shown in FIG. 5. In FIGS. 4 and 5 no electricalcomponents are shown at the side whereto the information and carrierlayers 14,15 are applied, but components may be present, and in thiscase a filler is introduced between the component. The filler is used toprovide a uniform and even surface, whereto the information and carrierlayers 14,15 may be applied. The filler is preferably a polymer whichmay be applied in fluid or semifluid state, and which is left to cure,before application of the information and carrier layers 14, 15. Theinformation layer 14 should be light and environmentally protecting ifthe layer 14 is applied directly to the surface of the wafer as shown inFIGS. 4 and 5. Thereby the necessary protection of the wafer isprovided. The information layer 14 is preferably a pre-printed label,which carries information identifying each amplifier.

[0049] The carrier layer 15 could be any coherent substance, which willkeep the singulated amplifiers together for subsequent treatment. Arigid plate could be used and in this case an adhesive must beintroduced between the carrier 15 layer and the information layer 14. Inone embodiment the carrier layer 15 is a flexible sheet whereto theamplifiers are adhered. Such a flexible sheet may be stretched to someextend, and this will provide more space 16 between the individualamplifiers for application of the light protection layer 17 to the edges18 of the amplifiers.

[0050] The carrier layer 12 of the embodiment according to FIG. 3 andthe carrier layer 15 according to FIG. 4 may look different, but in factthey serve the same overall purpose, namely to retain all of theamplifiers of the wafer attached and together during the singulation andduring subsequent processing such as applying light protection coatingto the edges of the amplifiers.

[0051] In the embodiment according to FIG. 6 four steps in the processof protection and singulation a, b, c and d are shown. At a, the wafer20 is supplied with a label 21 and fastened at the label side in asawing glue 22. Following this the individual amplifiers 25 aresingulated using standard sawing techniques but such that the label 21is also cut.

[0052] This creates furrows 24 between all amplifiers 25 and they arenow maintained in position by their adhesion to the sawing glue 22. Thewidth of the furrows 24 corresponds to the width of the saw-blade used.This is shown at b. At c it is shown how the furrows 24 between theamplifiers 25 is filled with a light protecting material 23. Thematerial 23 is dispensed into the furrows in a fluid or semi-fluidstate, and subsequently hardens or solidifies. In the last processingstep shown at d the furrows are now cut open once again, but this timeusing a saw with a smaller width. This provides new furrows 26 betweenthe amplifiers 25, and at the same time leaves light protecting material23 at the edges of each amplifier 25. The individual amplifies can nowbe peeled off the sawing glue and are now ready for use in an apparatus.The front side is provided with components and solder bumps as describedpreviously, (not shown in FIG. 6) and has a lightprotecting layer, theback side is provided with the light protecting label 21, and the sidesor edges are covered with the light protecting material 23. Allprocesses have taken place at wafer level.

1. A method for producing miniature amplifier and signal processing unitcomprising the steps of: producing arrays of individual integratedcircuits on a side of a wafer (5), where each circuit has a number ofI/O connection points; providing a number of solder connection pads (7)at each integrated circuit for redistribution of the I/O connectionpoints of the integrated circuit; coating the side of the wafer havingthe solder connection pads (7) with a coating of protection material (9)and ensuing through going apertures (8) in the coating to provideelectrical contact with the solder connection pads (7); applyingelectrical components (2) onto the coating and gaining electricalcontact with the solder connection pads (7) through the apertures (8) ofthe coating material (9); fastening the wafer (5) to a carrier layer,singulating the individual amplifiers from the wafer (5) by providingfurrows along the edges of each amplifier through the thickness of thewafer and ensuring protection of the edges of the amplifiers whileindividual amplifiers remain fastened to the carrier layer.
 2. Methodaccording to claim 1, wherein the following steps are performed:embedding a first side of the wafer (5) in a polymer substance (11);providing the carrier layer (12) to the polymer substance (11) andhardening the polymer substance (11) such that each amplifier isretained embedded in the polymer substance (11) and attached to thecarrier layer (12); singulating the amplifiers from the opposite side ofsaid first side of the wafer.
 3. Method according to claim 2, whereinthe singulation of the amplifiers is accomplished by means of v shapedfurrows (13) through the thickness of the wafer (5) provided along theedge of each amplifier.
 4. Method according to claim 2, wherein theprotection of the edges and possible unprotected side of the amplifiersis accomplished by applying a protection layer (10) to the amplifiers.5. Method according to claim 4, wherein the protection layer (10) isprovided by metalization of the amplifiers.
 6. Method according to claim1, wherein two or more carrier and/or information layers (14;15) areapplied to a first side of the wafer (5) prior to singulation, andwherein singulation is carried out from the opposite side of said firstside by providing furrows through the thickness of the wafer, and suchthat at least one information layer (14) is servered along the edges ofeach amplifier, and such that the individual amplifiers are retained onat least one un-servered carrierlayer (15).
 7. Method according to claim6, wherein electrical components are present at the first side of theamplifiers, and wherein the space between the components is filled witha filler material to produce a plane surface prior to application of thecarrier and/or information layers (14; 15) to the first side of thewafer (5).
 8. Method according to claim 6, wherein the severedinformation layer (14) is light protecting, and carries informationconcerning the identity of each amplifier.
 9. Method according to claim8, wherein the carrier layer (15) carrying the amplifiers is an elasticlayer, and that said layer (15) is stretched prior to coating the edges(19) of the individual amplifiers.
 10. Method according to claims 4,wherein the protection layer is provided by: filling up the furrows witha fluent or semi-fluent substance, hardening the substance, providing afurrow between adjacent amplifiers leaving the hardened substanceattached to the edges of each amplifier.
 11. Method according to claim9, wherein the amplifiers are peeled off the carrier layer (15) aftersingulation and coating.
 12. Method according to claim 1, wherein thesolder connection pads (8) and electrical components (2) are provided onboth sides of the wafer (5), and that through going apertures are usedto allow the I/O connections of the integrated circuit to gain contactwith the solder connection on the opposite side of the wafer (5).